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Return to: 2018 Feature Stories
CLIENT: WAVE COMPUTING
Dec. 17, 2018: EE Times
Without question, 2018 was the year RISC-V genuinely began to build momentum among chip architects hungry for open-source instruction sets. That was then.
By 2019, RISC-V won’t be the only game in town.
Wave Computing (Campbell, Calif.) announced Monday (Dec. 17) that it is putting MIPS on open source, with MIPS Instruction Set Architecture (ISA) and MIPS’ latest core R6 available in the first quarter of 2019.
Art Swift, hired by Wave this month as president of its MIPS licensing business, described the move as critical to accelerate the adoption of MIPS in an ecosystem.
Going open source is “a big plan” that Wave CEO Derek Meyer, a MIPS veteran, has been quietly fostering since Wave acquired MIPS Technologies in June, explained Swift. Swift himself is a MIPS alumnus who worked at the company as a vice president of marketing and business development for four years.
Wave, which styles itself as a tech startup poised to bring “AI and deep learning from the datacenter to the edge,” sees MIPS as a key to advancing Wave’s AI into a host of uses and applications.
Included in MIPS instruction sets are extensions such as SIMD (single instruction, multiple data) and DSP. Swift promised that MIPS will bring to the open-source community “commercial-ready” instruction sets with “industrial-strength” architecture. “Chip designers will have opportunities to design their own cores based on proven and well tested instruction sets for any purposes,” said Swift.
Since 2000, 8.5 billion chips based on MIPS cores have been shipped, according to Swift. A broad range of customers are sticking with MIPS, including Microchip, Mobileye (now an Intel company), MediaTek, and Denso, Japan’s leading tier one.
Although commanding consistent respect among engineers, MIPS — whose ownership has been anything but stable — has struggled to build its ecosystem and generate momentum. MIPS trails far behind Arm today. Wave’s goal is to reverse a trend that looked for a long time like a downward spiral for MIPS.
Asked how current MIPS partners reacted to Wave’s plan to open-source MIPS, Swift said, “Jaws dropped.” Among the comments: “Had this happened two or three years ago, RISC-V would have never been born.”
Asked if MIPS is coming to the open-source community too late, industry opinions appear split.
Linley Gwennap, principal analyst at the Linley Group, told EE Times, “MIPS is certainly behind RISC-V in mindshare in the open-source community.” He noted that MIPS was “unable to make this move sooner due to its various ownership transitions.”
Nonetheless, Gwennap added, “Given the advantages it [MIPS] offers, I think there is still time for it to gain design wins.”
Rupert Baines, CEO of UltraSoC, told EE Times, “Given RISC-V’s momentum, MIPS going open source is an interesting, shrewd move.” He observed, “MIPS already has a host of quality tools and software environment. This is a smart way to amplify MIPS’ own advantage, without losing much.”
He said, for some SoC designers, “MIPS can be an alternative to adopting RISC-V.”
A U.K. company based in Cambridge, UltraSoC supplies advanced debugging and analytic technology for embedded systems and it is an active supporter of the RISC-V. However, Baines has always maintained that choosing a processor core “shouldn’t be a religious war.” For chip architects and designers tasked to deliver heterogeneous systems which include different processors, the ISA is only a small consideration, he said. A much bigger issue is coping with the problem of complexity in a “whole system.”
Industry observers agree on the maturity of MIPS.
Gwennap said, “The MIPS ISA is more complete than RISC-V. For example, it includes DSP and SIMD extensions, which are still in committee for RISC-V.”
In addition, MIPS is a commercially proven ISA that has already shipped billions over more than two decades, said Gwennap, “The MIPS software development tools are more mature.” Further, he noted, “MIPS also provides patent protection and a central authority to avoid ISA fragmentation, both of which RISC-V lacks. These factors give MIPS an advantage for commercial implementations, particularly for customer-facing cores.”
Participants in the MIPS Open program will have free access to the most recent versions of the 32-bit and 64-bit MIPS ISA with no licensing or royalty fees, according to MIPS.
The future success of MIPS greatly depends upon community efforts. “How vibrant and thriving a community we can build is a key,” acknowledged Swift. Going “open source” can’t be just an empty mantra. “All-out open source efforts must be fully supported and properly managed. The community must be able to support its own development,” Swift added.
So, who will manage the MIPS Open program?
Discussions are still ongoing within a steering committee, Swift said. Proper management is indeed critical to assure MIPS customers that development tools, applications and other value-added features and services provided by the MIPS Open ecosystem will fit with new implementations.
As UltraSoC CEO Baines pointed out, “Just as RISC-V Foundation must maintain the standard for its instructions to avoid fragmentation, MIPS must also its enivroment.”
Swift himself is keenly aware of the challenges in building an open-source community. Swift served as vice-chair of the RISC-V Foundation’s Marketing Committee. He remains president of the prpl Foundation.
Asked who will run the MIPS Open program, Swift suggested building a new foundation or moving it to an already existing open-source group such as the prpl Foundation.
The prpl Foundation, founded in 2015, is an open-source, community-driven consortium. It focuses on enabling the security and interoperability of embedded devices — such as customer premise equipment, IoT and home gateway systems, according to Swift. Its members include Arris Technology, Intel, Vodafone, Qualcomm, Broadcom and others.
Baines agreed, noting that “the prpl Foundation might not be a bad place.” But Swift made it clear that this has not been decided yet.
For the time being, the MIPS Open initiative will be moderated by Wave Computing and an advisory committee that will include industry-leading OEMs, partners, universities and technology luminaries who will help guide community-driven innovations on MIPS, according to Wave’s press release. Further, “MIPS Open initiative will also include certified verification partners who will assist in ensuring compatibility of implementations and preventing architectural fragmentation,” Wave noted.
By going open source, Wave might be able to rescue MIPS’ relevance in the era of growing RISC-V. However, as Gwennap noted, “This approach makes it more difficult for MIPS to gain licensing revenue.” He said, “The challenge is to find a business model that balances open availability against revenue generation.”
For Wave, promoting “AI for All” with plans to license Wave’s IPs on AI, MIPS is deemed critical in accelerating its AI into the market. Lee Flanagin, Wave’s senior vice president and chief business officer, said in a statement:
The MIPS-based solutions developed under MIPS Open will complement our existing and future MIPS IP cores that Wave will continue to create and license globally as part of our overall portfolio of systems, solutions and IP. This will ensure current and new MIPS customers will have a broad array of solutions from which to choose for their SoC designs and will also have access to a vibrant MIPS development community and ecosystem.
In a previous interview, Swift said MIPS’ strategy will use its “multi-threading architecture, cache coherence and heterogenous clusters to its AI advantage.”
For a long time, MIPS suffered from industry analysts' perception of the architecture as old. In addition to some MIPS patents that might have already expired, MIPS’ reputation further eroded in the past decade with the sale of patents after MIPS Technologies sold itself to Imagination Technologies in 2012.
In parallel with its sale to Imagination, MIPS also entered into a separate agreement to sell patents to Bridge Crossing. Bridge Crossing got 498 of MIPS' 580 patent assets for gross proceeds of $350 million. MIPS, meanwhile, retained the remaining 82 patent properties directly relevant to the MIPS architecture and was also be granted a royalty-free, perpetual license to all of the patents sold to Bridge Crossing.
During the length of Imagination's ownership, though, many of the MIPS patents were licensed back from Bridge Crossing, Wave explained to EE Times. Notwithstanding all these the twists and turns in the ownership of MIPS patents, Wave announced that “participants in the MIPS Open program will be licensed under MIPS’ hundreds of existing worldwide patents."
Any prediction of MIPS’ future must also consider the China factor. A long time before Chinese industry groups in China jumped on RISC-V, China held MIPS near and dear to its heart. The Beijing-based Institute of Computing Technology (ICT) led several generations of the MIPS-based Godson chips. The Chinese government, through its Loongson-based supercomputing projects, maintained a steady interest in MIPS.
Although most fabless chip companies in China now focus on smartphones belonging to the Arm camp, BLX IC Design Corp. (Loongson), Action and Ingenic are still using MIPS. Swift is very familiar with most of the MIPS players in China, “because I worked with them,” he told us. Given China’s appetite for RISC-V, Swift said the prospect of MIPS going open source “fits very nicely in China.”
With MIPS going open, a bigger question is Arm’s next move.
However, it’s hard to even fathom how Arm could follow suit. Compared to MIPS, “Arm going open source would be huge news,” said Baines. “But Arm will have a lot more to lose.”
Return to: 2018 Feature Stories